ABSTRACT

Mixed Scaling Rotation Coordinate Rotational Digital Computer (MSR-CORDIC) algorithm has found its application in the areas where the rotation angles are known beforehand.
The algorithm merges the micro-rotation and scaling operations resulting in the elimination of the overhead caused by the scaling operation. Through this paper, an improved MSR-CORDIC algorithm is proposed. This algorithm provides higher signal-to-quantization-noise ratio (SQNR) performance while preserving the features offered by the original MSR-CORDIC algorithm. The novelty of the paper lies in redefining the amplifying factor by multiplying the rotational sequences to the corresponding signed-power-of-two (SPT) terms. The proposed algorithm offers a better alternative to MSR-CORDIC without additional hardware complexity.
 

 

Keywords: Coordinate Rotational Digital Computer (CORDIC) algorithm, Fast Fourier Transformation (FFT), Mixed Scaling Rotation (MSR)-CORDIC, Signal to Quantization Noise Ratio (SQNR), VLSI