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Faculty



Anurag Lakhlani

Senior Lecturer

MS (The University of Texas at Arlington)

+91.79.61911111

anurag.lakhlani@ahduni.edu.in


Research Interests: VLSI Technology And Design, Semiconductor Device Characterization And Modeling, Embedded System Design, Internet Of Things.


Profile

Anurag Lakhlani joined Ahmedabad University in October 2015. He has about 5 years of Industrial Experience, 8 years of Teaching Experience and about 2.5 years of Research Experience. He teaches courses in M.Tech. and B.Tech. studies at School of Engineering and Applied Sciences, Ahmedabad University. Since December 2016, he is also working as Chair of M.Tech. Program in CSE at the School of Engineering and Applied Sciences, Ahmedabad University. 

Education:
MS in Electrical Engineering from The University of Texas at Arlington, USA
MS Thesis: “Device Characterization and experimental determination of Thermal Resistance for DIBJTs”
 
B.E. (in IC) from L.D. College of Engineering, Gujarat University, Ahmedabad, India
B.E. Final Year Project: “Design of microcontroller based process controller for industrial applications”.

Publications

Book
"Manage your Mind: For Emotional Intelligence, Feelings, Moods and Stress Management"  ISBN : 978-1-4828-3333-1

Summary of the Book: 
In today’s fast and demanding life, our happiness and quality of life depend upon how effectively we manage emotions, feelings, moods and stress. We often encounter situations where we need to manage the state of mind promptly. Other times, the deeper understanding of mind, self and life is needed. Emotions, Feelings, Moods and Stress arise in mind. By understanding how mind functions, we can manage all of the above.
The book develops “Quick Action Tools” and “Deep Action Tools” to manage mind effectively. A novel strategy based on “Intensity and Time Duration” of emotions is formulated. This strategy is applied to manage major emotions, feelings, moods and stress.
 
Technical Paper Selected for publlication: 

  • Manan Mewada, Mazad Zaveri and Anurag Lakhlani, “Estimating the Maximum Propagation Delay of 4-bit Ripple Carry Adder using Reduced Input Transitions”, paper selected for presentation at 21st VLSI Design and Test Symposium (VDAT-2017) to be held in IIT Roorkee from June 29th to July 2nd, 2017. 
 Technical Book Review: 
Book Reviewed (Pre-publication) and gave feedback to the publisher: 
  • Book Title: “IC Fabrication Technology”
  • Publisher: McGraw Hill Publication (India) Pvt. Ltd.
  • Author: Gouranga Bose
  • ISBN Detail:  ISBN 10: 1259029581
  • Publication Year: 2014

Teaching

Summary of Teaching Experience in India (Since July 2009)

  • Number of Master’s Students Guided for final year Project/Thesis: 6
  • Number of Bachelor’s Students Guided for final year project: 46
Selected Subjects Taught in Masters Studies:
  • High-Performance Computing (at School of Engineering and Applied Sciences, Ahmedabad University)
  • Internet of Things: An Embedded System Design Perspective (at School of Engineering and Applied Sciences, Ahmedabad University)
  • Physics of MOS Transistors
  • IC Fabrication Technology
  • VLSI Technology and Design
  • ASIC Design
Selected Subjects Taught in Bachelor’s Studies:
  • Integrated Circuit Devices and Technology (at School of Engineering and Applied Sciences, Ahmedabad University
  • Embedded System Design (at School of Engineering and Applied Sciences, Ahmedabad University)
  • High-Performance Computing (at School of Engineering and Applied Sciences, Ahmedabad University)
  • Internet of Things: An Embedded System Design Perspective (at School of Engineering and Applied Sciences, Ahmedabad University)
  • VLSI Technology and Design
  • Basic Electronics
  • Digital Logic Design
  • Microprocessors and Interfacing
  • Microcontrollers and Interfacing
  • Embedded Systems
  • Power Electronics

Silicon Valley Industrial Experience

Worked with National Semiconductor Corporation's "Advanced Process Technology Development Group" in Santa Clara, California, USA, for about 4 years (June 2005 to May 2009). 

Summary of Skills and Knowledge Developed: 

  • Excellent knowledge of devices including BJT, HBT, MOSFET, and Passive Devices.
  • Experience in the field of device characterization (DC/CV/AC/RF) using semiconductor parameter analyzers, CV meter, Network analyzers. Experience in using ICCAP as platform for measurement, simulation and model parameter extraction.
  • Experience in the field of SPICE model parameter extraction with emphasis on Silicon, SiGe, and SOI BJTs.
  • Experience in test structure design for modeling and DC/RF testing purposes.
  • Experienced in writing programs for model parameter extraction using ICCAP PEL.
  • Experienced with EDA simulation tools (Cadence spectre).
  • Sound understanding of Process Integration/Semiconductor Fabrication process.
  • Strong problem solving and analytical skills, quick learner with innovative thinking abilities.
  • Self motivated and proactive contributor with effective communication skills. A reliable and dependable team player
 
Details of Work Experience and Skills Developed
  • Experienced with on-wafer DC/CV/RF/temperature characterization for active and passive devices using Cascade 10K/12K and Suss PA200PS probers.   Experienced with Agilent Parametric Analyzers (4156/5270B), Network Analyzers (8510, 8753, PNA), LCR Meters (4284).  Experience with 1/f noise measurements using BTA 9812B and in-house Labview program.
  • Expertise in SPICE model parameter extraction with emphasis on bipolar devices including SiGe BJTs,, SOI BJTs,  Power Lateral PNPs, Substrate PNPs  using SGP and VBIC model formulations (VBIC v1.15 and v1.2 for SOI).  Developed in-line sub-circuit models using SGP and VBIC for model enhancement.
  • Experienced with resistor modeling using 2-terminal models, Rdiff model for voltage dependence modeling for diffused resistors and JFET models for very lightly doped resistors.
  • Responsible for the development of test structures for accurate DC/CV/RF measurements for bulk and SOI BJTs.   
  • Responsible for development of programs/macros in ICCAP-PEL for model parameter extraction, post extraction parameter validity range checking, automatic corner model generation for Lateral PNPs, and parameter optimization during extraction.
  • CAD simulation/EDA tools:  Cadence spectre/mmsim.
  • Modeling representative in cross-functional teams consisting of TCAD, process integration, device reliability, circuit design, and CAD engineers.
  • Sound understanding of technology development process for Power and RF applications (bulk and SOI) for analog and mixed-signal circuit design applications.

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Ahmedabad University
GICT Building, Central Campus
Navrangpura, Ahmedabad 380009
Gujarat, India

office_seas@ahduni.edu.in
+91.79.61911100
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